1. Field of the Invention
The invention relates to an output buffer, and more particularly to a high-speed and low-noise output buffer with a slew control function in coordination with a GTL+ signal specification.
2. Description of the Related Art
In a typical digital circuit, two digital signals with 0V and 5V generally represents two different logic levels. Devices used in the digital circuit include TTL and CMOS devices. Digital circuits constituted by TTL devices have faster switch speeds, but have more consumption in DC power while digital circuits constituted by CMOS devices have less consumption in DC power, but have slower switch speed and higher noise. Furthermore, as the operating frequencies of digital circuits increase to several tens of MHz, devices improperly arranged or separated from each other in the digital circuits can cause the problem of Electro Magnetic Interference (EMI).
The operating voltages of CMOS digital circuits are getting lower and lower in line with the progress in semiconductor process. If the operating voltages of two integrated circuits (ICs) located on both ends of a transmission line are not consistent, the two ICs output two high logic levels with different potentials. To resolve those problems mentioned above, a GTL (Gunning Transceiver Logic) signal specification for output buffer is introduced. Later, a GTL+ signal specification is further provided for improvement. Since the magnitude of the GTL+ signal is between 0V and 1.5V, and one terminal of a signal transmission line is connected to 1.5V via a terminal resistor, the difference between the operating voltages of two ICs cannot make the output high potentials thereof different, when the transmission line is used for a two-way transmission.
Referring to FIG. 1, an output buffer 100 receives an input signal A, and then transmits an output signal V.sub.o, wherein the input signal A generally includes two logic levels, a high potential and a low potential, and the output signal V.sub.o varies with the input signal A. Next, the output signal V.sub.o is transmitted to output/input ends of another device 171 via a transmission line 160. Since an open drain method for connecting the FET 130 is adopted, the two-way transmission can be implemented on the transmission line. As an FET 130 is turned off, an input buffer 180 can receive signals coming from another device 172. In order to make high potentials to be the same during the two-way transmission, one terminal of the transmission line 160 is connected to power source Vtt (generally 1.5V) via a terminal resistor 165.
The output buffer 100 includes two driving transistors (FETs) 110 and 120 and an output transistor (FET) 130. The two driving transistors 110 and 120 receive the input signal A, and then create a sufficient driving current to drive the output transistor 130. Subsequently, the output transistor 130 provides a further powerful driving capability to drive other devices connected to the transmission line 160.
When the input signal A is at a low potential, the FET 110 is turned on to pull up the potential of the gate of the FET 130 to a high potential, thereby turning on the FET 130. Therefore, the potential of the output signal V.sub.o is pulled down to close to the ground potential. If the terminal resistor 165 has a resistance of Rtt, and the resistance of the FET 130 after being turned on is Rm, then the output voltage V.sub.o, being at a low potential, can be expressed as follows: EQU Vo=Vtt*Rm/Rm+Rtt
When the input signal A is at a high potential, the FET 120 is turned on to pull down the potential of the gate of the FET 130 to the ground potential, thereby turning off the FET 130. Since the FET 130 is connected to the transmission line 160 by an open drain method, the potential of the output signal V.sub.o is pull up to the power source V.sub.tt serving as a high potential when the FET 130 is turned off. Moreover, the output state can be changed into an input state, such that the input buffer 180 can receive signals transmitted from other devices.
Referring to FIG. 2, a wave form (A) represents the input signal A, wherein a low potential is changed into a high potential at a time t1. Here, the discussion only focuses on the signal variation of the output buffer, and the time delay of the input signal A is therefore omitted. When operating at a low frequency, a low potential is completely changed into a high potential after a delay time d1 as shown in a wave form (B) representing the output signal V.sub.o. Consequently, how to shorten the delay time d1 thereby to increase the operating frequency becomes more important. However, the minimum of driving capability of the output transistor is regulated by the specification of a general output buffer. Therefore, only the capabilities of driving current of the driving transistors of the output buffer 100 can be enhanced to increase the switch speeds of the transistors. However, if the capabilities of driving current of the driving transistors 110 and 120 are merely enhances to shorten the delay time, it further worsen the output signal. As can be see from a wave form (C) shown in FIG. 2, after a delay time d2, the output signal V.sub.o is changed from a low potential into a high potential. However, since the FET 130 is swiftly turned off, resulting in over speed on the change of the output signal V.sub.o, the ring back indicated by reference symbol P is created. Thus, it is difficult for the receiving end to distinguish signals between the logic levels "0" and "1", causing the system unstable.
It is obvious that the disadvantages of the output buffer according to the prior art as shown in FIG. 1 is described follows.
(1) Although the noise is reduced by decreasing the driving capability of the driving transistors of the output buffer, thereby slowly turning on or off the output transistor, the delay time is increased, resulting in being unable to increase the operating frequency.
(2) By increasing the operating frequency, the driving capability of the driving transistors of the output buffer can be increased. However, this causes the output transistor to be swiftly turned on or off, leading to the increase of the switch speed. That is, the ring back is easily encountered, creating unnecessary noises and causing the system's operating unstable even though the operating frequency is increased.